JEDEC JEP122G
$98.00
FAILURE MECHANISMS AND MODELS FOR SEMICONDUCTOR DEVICES
standard by JEDEC Solid State Technology Association, 10/01/2011
Description
This publication provides a list of failure mechanisms and their associated activation energies or acceleration factors that may be used in making system failure rate estimations when the only available data is based on tests performed at accelerated stress test conditions. The method to be used is the Sum-of-the-Failure-Rates method.
Product Details
- Published:
- 10/01/2011
- Number of Pages:
- 108
- File Size:
- 1 file , 2.1 MB
- Note:
- This product is unavailable in Russia, Ukraine, Belarus