JEDEC JESD60A

$40.00

A PROCEDURE FOR MEASURING P-CHANNEL MOSFET HOT-CARRIER-INDUCED DEGRADATION AT MAXIMUM GATE CURRENT UNDER DC STRESS

Published by Publication Date Number of Pages
JEDEC 09/01/2004 24
PDF FormatPDF FormatMulti-User-AccessMulti-User AccessPrintablePrintableOnline downloadOnline Download
Category:

Description

JEDEC JESD60A – A PROCEDURE FOR MEASURING P-CHANNEL MOSFET HOT-CARRIER-INDUCED DEGRADATION AT MAXIMUM GATE CURRENT UNDER DC STRESS

This method establishes a standard procedure for accelerated testing of the hot-carrier-induced change of a p-channel MOSFET. The objective is to provide a minimum set of measurements so that accurate comparisons can be made between different technologies. The measurements specified should be viewed as a starting pint in the characterization and benchmarking of the trasistor manufacturing process.

Product Details

Published:
09/01/2004
Number of Pages:
24
File Size:
1 file , 85 KB
Note:
This product is unavailable in Russia, Ukraine, Belarus